III-V type semiconductors are compounds such as GaAs, InSb, InP, InAS and In.sub.x Ga.sub.x-1 As, where In and Ga are in Group III in the periodic Table and As, Sb and P are in Group V. These materials have been under investigation by the semiconductor industry for many years. The physical properties of some of these materials, particularly gallium arsenide, show them to be superior to silicon for certain applications. Properties such as larger band-gap energy, along with higher electron mobility and larger electron saturation drift velocities means faster device operations. One particularly attractive application for these III-V materials is in insulated gate field effect transistors operating in the inversion mode (IGFET).
An insulating gate field effect transistor operating in the inversion mode operates on the principle that when a bias voltage is applied to the insulated gate (a dielectric material), the potential alters the surface potential of the semiconductor material, creating an inversion layer.
The inversion layer is created by the effect the potential on the gate (shown at 14 in FIG. 4) has on the position of the valence and conduction bands located at the surface of the semiconductor relative to the position of the energy bands in the bulk. Essentially, this potential bends these bands near the interface surface of the semiconductor and the insulated gate, toward or away from the fermi level depending on the charge on the gate and whether the semiconductor material is p- or n-type. In p-type gallium arsenide, when a positive bias is applied to the gate, the conduction band is shifted toward the fermi level resulting in the generation of electrons populating the conduction band. Under this condition, the near surface of the p-type semiconductor is inverted to n-type. This inversion results in an excess of electrons in a layer between the source (shown as 12 in FIG. 4) and the drain (shown as 16 in FIG. 4). These electrons, the quantity of which is dependent on the gate potential, are available for conduction. As a result, a controllable electro-conduction path exists between the source and the drain, which permits the transistor to function.
One basic problem in utilizing III-V semiconductor material in IGFETs, is the difficulty in finding a passivating material which does not result in a high surface state density, thereby pinning the fermi level near mid-gap and creating a condition which prevents inversion from taking place. It was determined some time ago that the presence of oxygen at the interface results in the generation of a high density of extrinsic surface states. Therefore, an assessment of the suitability of an alternate dielectric for the passivation of III-V semiconductor surfaces is dependent on a material which is substantially oxygen free and which will permit the deposition of the dielectric without the formation of an intervening interfacial oxide layer. Additionally, such material must have good electrical and thermal stability, be chemically inert, and must be capable of being applied at temperatures which will not decompose the semiconductor surface.
The availability of an effective, stable passivating material, in particular one which will allow the production of insulated gate field effect transistors operating in the inversion mode, would have a significant impact on the III-V semiconductor device industry. In particular, it would open the way for the fabrication of these IGFETS which are necessary components for implementing III-V semiconductor large scale integration (LSI) high speed digital circuits. Accordingly, what is needed in the art is a method for forming phosphorous-nitrogen based films at low enough temperatures to allow their use as coatings with III-V semiconductors.